Argomenti trattati
In a world where technological giants are battling it out like gladiators in the Roman Colosseum, Huawei has filed a patent that might just change the game—or at least make some noise. The company’s ambitious quad-chiplet design for its upcoming AI accelerator, rumored to be the Ascend 910D, has sparked discussions about its potential to rival Nvidia’s dominance. But let’s be honest, is this just another flashy attempt to distract us from their actual performance? The whole situation reeks of desperation, don’t you think?
Huawei’s design: a copycat or a true innovator?
At first glance, Huawei’s quad-chiplet approach seems to be a blatant imitation of Nvidia’s quad-chiplet Rubin Ultra. But the real kicker is the underlying technology—the advanced packaging techniques that could rival TSMC, the reigning champ in chip manufacturing. It’s almost like watching a toddler trying to build a sandcastle beside a master architect—they might throw a few pebbles together, but will it hold against the tide? The patent hints at a design that could allow Huawei to swiftly circumvent US sanctions, potentially leveling the playing field in AI GPU performance.
Now, let’s dive into the juicy bits of this patent. It describes a processor where the chiplets connect like bridges, reminiscent of TSMC’s CoWoS-L or Intel’s EMIB with Foveros 3D technology—rather than just slapping an interposer on it. Isn’t that adorable? While the tech world is abuzz with excitement over the possibilities, one can’t help but wonder if this is a classic case of style over substance. After all, we’ve seen plenty of ambitious plans fizzle out like a cheap firework.
Packaging vs. lithography: the critical battleground
Let’s not kid ourselves; while SMIC and Huawei are lagging in lithography, they might just strike gold with packaging. Imagine a scenario where Chinese companies leverage advanced packaging to connect multiple chiplets using outdated process nodes. Could they actually mimic—or even come close to—the performance of cutting-edge chips? It sounds like a tech fairy tale, but then again, who wrote the rules on what’s possible in this cutthroat industry?
The math behind this quad-chiplet design is dizzying. The current single-chiplet Ascend 910B has a die size of 665 mm². Quadruple that and you’re looking at a whopping 2,660 mm² for the 910D. Add in four HBM chiplets, and you’re suddenly dealing with a DRAM footprint that could reach 1,366 mm². But here’s the kicker: producing an Ascend 910D could require a staggering total silicon area of 4,020 mm². TSMC plans to roll out a similar packaging approach in 2026, which means Huawei is either a visionary or simply chasing shadows.
The rumors swirl: what’s next for Huawei?
Now that the whispers about Huawei’s quad-chiplet Ascend 910D are gaining traction, we must ask—are we really ready to believe this hype? Sure, the whispers from April are growing louder, but let’s keep our expectations in check. The tech world is littered with unfulfilled promises and patents that never see the light of day. So, is Huawei on the brink of a breakthrough or just another player flailing in the deep tech ocean?
Beyond the 910D, rumblings of a future Ascend 920 processor are surfacing, purportedly meant to take on Nvidia’s H20. But let’s be real for a second—the naming conventions are as logical as a drunkard trying to recite Shakespeare. Yet, if there’s even a hint of truth in these reports, we might be in for an interesting ride. Just remember, in the tech world, things can change faster than you can say ‘patent pending.’