Intel has unveiled exciting details about its next-generation Xeon 7 processors, codenamed Diamond Rapids. These powerful CPUs, set to launch in 2027, boast up to 256 P-cores and 1.28 GB of last-level cache marking a substantial advancement in data center technology. The new range introduces several cutting-edge features, including the enhanced 18A-P processUCIe interconnectsAVX 10.2 and Intel’s new fan-out fabric.
At the Hot Chips 2026 conference, Intel provided a comprehensive overview of Diamond Rapids’ architecture, highlighting its innovative design and performance capabilities. The processors are built using a modular approach, featuring Compute Building Blocks (CBBs) that integrate core chiplets with base tiles. Each core chiplet can house up to 16 cores, and up to four of these chiplets can be integrated into a single CBB. The full Diamond Rapids SoC includes four base tiles, two fabric hub tiles, and 16 core chiplets, all interconnected using advanced packaging techniques.
Innovative Architecture and Packaging
The Diamond Rapids architecture represents a significant departure from previous designs. Intel has centralized memory and I/O subsystems while pushing the cores to the edges of the chip. This layout not only improves thermal management but also enhances The processors utilize Foveros Direct 3D bonding to connect compute tiles to base tiles and UCIe-S interconnects to link fabric hub tiles to the cores via copper connections.
Intel’s decision to use UCIe-S instead of its proprietary Embedded Multi-die Interconnect Bridge (EMIB) was driven by the need for low-latency, uniform connections across longer distances. This choice ensures efficient communication between the CBBs and the centralized fabric hubs, which manage memory and I/O operations.
Enhanced Performance and Efficiency
Diamond Rapids CPUs are built on Intel’s latest 18A-P node which offers a 9% performance boost at peak levels or an 18% reduction in power consumption at iso-performance. This advanced process technology, combined with the new architecture, positions Diamond Rapids as a formidable contender in the data center market.
The processors support up to 16-channel memory with speeds of up to 8,000 MT/s for DDR5 and 12,800 MT/s for MRDIMMs. This significant increase in memory bandwidth is crucial for handling bandwidth-limited applications. Additionally, Diamond Rapids features a flexible I/O subsystem with support for 128 lanes of PCIe 6.0CXL 3.0 and UPI 3 providing extensive scalability for I/O-heavy workloads.
Advanced Performance Extensions and AVX 10.2
Diamond Rapids marks an important milestone in Intel’s journey with AVX-512 and Advanced Performance Extensions (APX). The new CPUs support AVX 10.2 which enables execution on both P-cores and E-cores, unlike AVX 10.1, which was limited to P-cores. AVX 10.2 introduces converged 256-bit vectors, enhancing performance across a wider range of applications.
Intel’s APX technology doubles the number of general-purpose registers from 16 to 32, improving software performance without requiring code changes. APX also includes key instruction updates like condition load and store, further optimizing performance. These advancements, combined with the centralized I/O and memory communication, make Diamond Rapids a highly innovative and competitive offering in the data center space.
As the demand for agentic workloads continues to grow, Intel’s Diamond Rapids CPUs are poised to play a crucial role in meeting these evolving needs. With their advanced features and performance capabilities, these processors represent a significant step forward in data center technology.
